The present invention relates generally to the field of semiconductor light emitters and more particularly to the field of vertical cavity surface emitters, including lasers.
A goal of the semiconductor industry is to fabricate light emitting devices for use in either optical fiber or free space optical interconnects. For such applications a benefit in the optical interconnect complexity is derived with the use of light emitting devices such as semiconductor lasers or spontaneous light emitting diodes which operate with both high power conversion efficiency and minimal input power thus allowing a large number of individual semiconductor light emitters to act as signal transmitters for a given total input power. For these semiconductor light emitters, a challenge is to realize a small volume region which highly confines both injected electrical charge carriers as well as the internal optical mode. This small volume then minimizes the input electrical power required to achieve lasing threshold, and leads to cavity controlled spontaneous emission in a light emitting diode and improved power conversion efficiency. In the vertical cavity surface emitting laser (Jewell et al., 1991) and the resonant cavity light emitting diode (Deppe et al., 1990; Schubert et al., 1994) both the optical mode and the injected charge carriers are highly confined in only the normal direction of the cavity. Both types of devices are based generally on short, planar semiconductor Fabry-Perot cavities fabricated through epitaxial crystal growth in the normal direction to the crystal surface. The length dimension in the normal direction to the cavity which establishes the length of the optical mode can be controlled only to a length of one or several emission wavelengths (on the order of microns), while the charge carriers in the cavity normal direction are confined to dimensions of hundreds of angstroms through the use of heterojunction quantum wells.
For the resonant cavity light emitting diode, in controlling the length of such cavities one can also control the spontaneous emission from the injected charge carriers. Following the work of Drexhage (Drexhage. 1974), it has been shown that the collection efficiency and speed of light emitting diodes can be increased through planar optical confinement (Deppe et al., 1990, NeNeeve et al., 1995; Huffaker and Lin et al., 1995). However, the planar Fabry-Perot cavity is limited by its weak lateral confinement in controlling spontaneous emission. If an attempt is made to reduce the lateral size of the planar cavity device to less than a dimension characteristic of the vertical loss rate of the cavity, the resulting optical mode internal to the laser cavity will suffer high diffraction loss, and therefore loss of lateral optical confinement, resulting in both an increased input power requirement and a reduced power conversion efficiency. For vertical cavity surface emitting lasers of AlGaAs/GaAs/InGaAs materials and previous planar designs the characteristic limiting lateral dimension is an 8 to 10 xcexcm optical mode diameter.
One possible solution to reduce the lateral size of the vertical cavity surface emitting laser is to etch the lateral dimension into the shape of a pillar, therefore relying on the large lateral index change from the semiconductor to air to confine the optical mode (Jewell et al., 1991). Such pillar shaped vertical cavity surface emitting lasers suffer both carrier losses due to high recombination rates at the damaged semiconductor surfaces as well as high optical scattering losses. In addition, a second serious difficulty with this type of device is the exposed AlAs or AlGaAs material left at the crystal surface. The AlGaAs is unstable in the oxygen rich room ambient and decomposes in times ranging from minutes to days or weeks, depending on the layer thicknesses and Al composition. Therefore, without a protective coating to effectively seal the AlGaAs material this type of device is inherently unreliable.
If only the electrical current and charge carriers are confined, the lateral dimension of the optical mode cannot be reduced beyond that characteristic of the vertical cavity design without suffering high diffraction loss, and therefore increased power consumption and reduced power conversion efficiency, as stated above. One such attempt to control only the current is a vertical cavity surface emitting laser described in U.S. Pat. No. 5,359,618 (Lebby et al., 1993) in which the second or upper mirror consisting of an AlAs/GaAs Bragg reflector is formed into a mesa, and a portion of the layers of the mesa adjacent the exposed outer walls has a reduced electrical conductance through either selective oxidation of the AlAs layers achieved by applying a wet ambient to the mesa at a temperature of 400xc2x0 C. or alternatively through selective etching of AlAs layers of the Bragg reflector. This process funnels current into the VCSEL active region and improves electrical efficiency. The device design described in U.S. Pat. No. 5,359,618, however, takes little advantage of controlling the optical mode, as only layers removed from the center of the cavity (in the upper portion of the Bragg relector) are either wet etched or selectively oxidized. If multiple layers of the mirror are oxidized or wet etched optical scattering loss will again limit device perfomance in similarity to the etched pillar design. If the lateral dimension of such a device is reduced to too small a value (less than or about 8 to 10 xcexcm) without proper placement of the oxide layers, diffraction and scattering loss will increase the threshold drive current. In addition, if selective etching is used to remove a portion of the upper mirror and thus form the current funneling electrical path, AlAs layers will be left exposed at the crystal surfaces of the device. As with the etched pillar of Jewell et al., 1990, unless treated to reduce their reactivity with an oxygen containing ambient, these exposed AlAs layers will decompose in the typical room air environment into undesirable oxide compounds and lead to rapid device failure. Also to date, wet etching of selected layers of the Bragg reflector has not resulted in improved device performance because of inherent mechanical instability of the remaining multiple thin layers. The wet etched device of U.S. Pat. 5,359,618 is therefore impractical.
There are therefore two serious problems facing the lateral size reduction of an AlAs (AlGaAs)/GaAs/InGaAs vertical cavity surface emitter to reduce the device power consumption and improve operating efficiency. The first being achieving a small area low loss optical mode within the cavity, and the second being the chemical instability of any exposed AlAs (or high Al composition AlxGa1xe2x88x92xAs, xxe2x89xa70.6) which might remain at the device surface due to the device fabrication. If left unprotected, the exposed AlAs (or AlGaAs) will decompose over times of hours, days, weeks, or years, into various porous oxides thus leading to device failure (Dallesasse et al., 1990).
One such possible treatment of an exposed AlAs or AlGaAs is the steam oxidation as described in U.S. Pat. No. 5,262,360 of Holonyak and Dallesasse, and also in the laser device of U.S. Pat. No. 5,359,618 of Lebby et al. with reduced electrical conductance. The oxide described is formed by exposing an AlAs surface to a water vapor containing ambient (steam) at the elevated temperature range of 400 to 500xc2x0 C. This oxide formed by steam oxidation of AlGaAs is useful in forming low refractive index layers buried within an epitaxial AlGaAs/GaAs heterostructure as the oxidation proceeds at a very high rate, and to achieve lateral optical confinement within a semiconductor cavity. However, as a surface passivation layer the oxide formed by steam oxidation also has undesirable characteristics due to its thickness (typically greater than several microns) and strain created within the semiconductor device. Upon subsequent thermal cycling such as might occur in typical semiconductor processing (for example, metal contact annealing) the oxide formed by steam oxidation can crack the semiconductor and lead to device failure. In addition, the strain due to the thick oxide formed by steam oxidation can lead to device failure over long term operation. Controllable thin oxides formed by the steam oxidation, on the other hand, are difficult to achieve due to the high oxidation rate and the necessity to oxidize at temperatures greater than about 400xc2x0 C. (U.S. Pat. No. 5,262,360). Therefore, for very small AlAs/GaAs devices in which the AlAs semiconductor might form an exposed surface it is desirable to have an alternative method by which the AlAs crystal surface may be effectively sealed against further decomposition due to oxygen exposure.
It is highly desirable then to achieve the simultaneous confinement of both the electrical charge carriers and the optical mode of a vertical cavity surface emitting laser or light emitting diode to a small area, low loss optical mode, and therefore greatly reduce the power consumption as well as improve power conversion efficiency. Furthermore, since the processing of such small layered semiconductor structures of AlAs/AlGaAs/GaAs/InGaAs often involves exposing AlAs or AlGaAs surfaces which then decompose in the room ambient, a means of sealing an exposed AlAs or AlGaAs surface against oxidative decomposition which is compatible with the semiconductor processing is also highly desired.
It is a purpose of the present invention to provide a vertical cavity surface emitter wherein the spacer layer separating two cavity reflectors contains both internal optical and electrical confinement to achieve strong light confinement to a small area, low loss optical mode. While previous teachings suggest that the strong optical confinement need be achieved along the full length of the laser cavity (Jewell et al., 1991; Numai et al., 1993), a discovery of the present invention is that index confinement is optimally placed within the laser cavity spacer layer of the otherwise planar cavity to greatly reduce lateral diffraction loss but without the increase of optical scattering loss due to sidewall roughness or multiple apertures, and achieve a small area, low loss optical mode. In addition, by retaining a planar cavity a low electrical conductivity contact is made to the cavity, and both high electrical current injection efficiency and high optical mode confinement is readily achieved. Furthermore, for the vertical cavity surface emitting laser the index confinement is optimally placed within a lateral dimension characteristic of the vertical cavity design for laser operation, and more optimally within a lateral dimension characteristic of the coherence of the spontaneous emission from the electrical semiconductor charge carriers of electrons and holes. For present day AlAs/GaAs/InGaAs semiconductor light emitters, these lateral dimensions are less than 10 xcexcm and easily reach 2 xcexcm in diameter. Using such designs the present inventors have substantially reduced the required threshold drive level of a vertical cavity surface emitting laser over that of prior art in which threshold drive currents were typically greater than 0.5 mA, and more often greater than 2 mA, to less than 0.1 mA with room temperature operation. The low refraction index layer allows the lateral size reduction of the optical mode below that characteristic of the otherwise planar vertical cavity design, while maintaining low diffraction loss. The low refraction layer is also designed as electrically insulating so that electrical current is confined to the small light emitting area. Ultra low power operation of a semiconductor laser with high power conversion efficiency then becomes possible because of the very small and low loss optical volume. For the purpose of a spontaneous light emitting diode with controlled spontaneous emission, a discovery of the present invention is that the lateral index confinement within the cavity spacer can lead to controlled spontaneous emission into a single optical mode of the cavity, with the result of spontaneous angular narrowing in the radiated far-field. It is understood that the present disclosure is applicable to any group III-V crystal as that is understood in the art and that AlAs/GaAs/InGaAs/AlGaAs are used by way of example only.
Disclosed herein are small area half-wave cavity VCSELs with single QW active regions defined using the native-oxide process (Huffaker, Deppe, et al., 1994; Deppe et al., 1994). For the half-wave VCSEL the native-oxide can be formed very close to the active region, and the present disclosure demonstrates a 2 xcexcm laser in which the oxide is only 200 xc3x85 from the QW. A CW room-temperature lasing threshold current of 91 xcexcA is achieved.
The present invention may be described in certain embodiments as a vertical cavity surface emitter comprising a cavity spacer, wherein a low refraction index confining layer is built directly into, or is contained in the cavity spacer, so that a single or multiple QW active region can be placed in very close proximity to the low index layer (within one-fourth of an optical wavelength). The low refraction index confining layer is preferably in the upper part of the cavity spacer, but may also be in the lower part, or both. The cavity spacer may be a full wavelength spacer or may be more preferably a xc2xd wavelength spacer. A wavelength of xc2xd wavelength spacer is understood to mean the vertical dimension of the spacer is equal to the size of one wavelength or xc2xd wavelength, respectively of the emitted light. The cavity spacer is adjusted in thickness so as to achieve a spectral resonance between a semiconductor light emitting region and adjacent cavity reflectors, as is typical with a full wavelength cavity spacer or more preferably a xc2xd wavelength spacer. Within such an otherwise planar cavity, an optical mode will occur representing the lowest loss mode of the cavity. The lateral size of this lowest loss optical mode will be set by lateral diffraction of the field within the cavity, and is due to both the cavity spacer thickness and any field penetration into the mirrors, and the number of round trips within the cavity. Ujihara has derived the approximate expression for this lateral mode area given by Axcx9cxcexxc2x7L/(1xe2x88x92R) where xcex is the resonant wavelength within the cavity spacer material, L is the effective length of the total cavity including field penetration into distributed mirrors, and R is the mirror reflectivity product, square root R1R2 of the two cavity mirrors. A significant difficulty in fabricating small area vertical-cavity surface-emitters is the rapid increase in diffraction loss if an active area is reduced to less than the size of A. On the other hand, this diffraction loss can be controlled through the introduction of the low refraction index layer directly into the cavity spacer and within the mode area A of the otherwise planar cavity, with the result of controlling both the lateral diffraction loss and the lateral mode size. Typical dimensions of present day lateral mode sizes in semiconductor vertical cavity surface emitting lasers (VCSELs) based on AlAs/GaAs semiconductors is xcx9c6-10 xcexcm diameter. A certain embodiment described herein has reduced this mode size to  less than 2 xcexcm diameter. Scaling the threshold current with device area allows a 25-fold reduction in a required lasing threshold drive current in the mode size reduction from 10 to 2 xcexcm.
For VCSELs, the benefit of index-guiding in reducing optical mode loss is a significant improvement in the field, as most previous attempts have been directed toward etching of small diameter ( less than 8 xcexcm) cylindrical pillars to take advantage of the large semiconductor-air index change (Jewell et al., 1991). Such attempts have so far met with only limited success due to both carrier and scattering losses on the VCSEL sidewalls, and threshold currents are typically greater than 0.5 mA. Also, because such devices are typically realized from the AlAs/GaAs semiconductor and possess exposed AlAs surfaces, they can prove unreliable due to AlAs degradation in the atmospheric environment.
The low refraction index confining layer of the present invention may be a native aluminum oxide, and more particularly, may be AlxOy, where x is preferably=2 and y is preferably=3. In certain embodiments, the AlxOy is prepared by selective conversion of AlAs or AlGaAs using a steam oxidation at elevated temperatures of 400 to 500xc2x0 C. However, it is understood that the low refractive index layer may be prepared by other means such as chemical vapor deposition, electron beam deposition, sputtering, or other oxidation technique.
In the present invention, the low refraction index confining layer may also be an etched void. Etched voids present an added difficulty due to the chemical instability of any exposed AlAs layers. Such layers will degrade in the atmospheric environment with the result of early device failure. If an etched void is used, or if any exposed AlAs occurs on a device surface, the present discovery enables one to seal the surface against further decomposition, by subjecting the AlAs surface to a rapid temperature anneal (RTA) in an inert gas containing a small percentage (less than or xcx9c10%) of O2, where the inert gas may be nitrogen or argon or an inert gas with xcx9c10% H2 v/v at a higher temperature than one would normally use for the wet oxidation described above. For example, the RTA may be performed at a temperature of from about 400 to about 1000xc2x0 C. or at a temperature of from about 500 to about 600xc2x0 C. or even at a temperature of from about 525 to about 550xc2x0 C. The present disclosure demonstrates that the anneal may be performed for a time as brief as from 5 seconds to 10 minutes, or for a period of from about 5 seconds to 1 minute or for a period of from about 15 seconds to about 45 seconds or even for a period of about 30 seconds. The basis of the sealing of the AlAs surface is the self-terminating conversion of porous oxides formed at room temperature to a thin, dense protective oxide which is impermeable to further oxidative decomposition. The oxide formed by the RTA is a distinct material from that formed by the wet oxidation as described in U.S. Pat. No. 5,262,360 of Holonyak and Dallesasse. The higher temperature RTA formed surface oxide blocks further wet oxidation, making it useful as a mask of the wet oxidation. The practice of this embodiment of the present invention is of benefit in device processing by blocking subsequent steam oxidation and certain wet etches of AlAs. Although the AlAs or AlGaAs that is annealed by the present method is slightly oxidized by exposure to normal atmosphere, the rapid temperature anneal forms a dense structure that inhibits further oxidation.
In certain embodiments, the devices of the present invention will employ native oxides or etched voids, and will require subsequent steam oxidation or selective etching. The RTA oxide of the present invention will find utility as a mask for either subsequent steam oxidations or selective etches of such devices due to the greatly reduced HCl etch rate of RTA sealed AlAs surfaces compared to non-sealed surfaces. Since, in the device processing steps many AlAs layers might be exposed in which selective conversion to AlxOy due to steam oxidation is undesirable, the RTA sealing oxide can be formed first on these layers preventing their further conversion. In this manner a native oxide can be formed only in the VCSEL cavity or other desired AlAs layers, while the sealed AlAs surfaces remain intact.
In certain embodiments, the invention may be described as a vertical cavity surface emitter comprising a distributed Bragg reflector composed of layers of n-type AlAs and n-type GaAs and forming the bottom of the vertical cavity surface emitter, a second distributed Bragg reflector composed of layers of p-type GaAs and forming the top of the vertical cavity surface emitter, a spacer cavity of one-half wavelength vertical dimension between the distributed Bragg reflectors and a low refractive index layer is within the spacer cavity. The low refractive index layer may preferably be an AlxOy layer and may be formed by selective conversion of AlAs or AlGaAs, or alternatively, the low refractive index layer may be an etched void and the void may be sealed by a rapid thermal anneal.